Autonomous driving / Artificial Intelligence
Menta eFPGA IPs allow efficient implementation of Neural Network algorithms for e.g. for ADAS vision applications - thanks to large bandwidth and very low latency. See the paper presented by Menta at DAC in June 2018 that describes usage of our eFPGA IP with Kortiq neural network algorithms.
The deterministic nature of the eFPGA IPs also make them great candidates for situation awareness and decision making algorithms.
Security of electronic system is of utmost importance - especially in life critical systems such as vehicles on the road. Running encryption / decryption algorithms on Menta eFPGA IPs allow these algorithms to be updated in the field - increasing the lifetime of the electronic systems embedded in the vehicle.
Electronic Control Units
Menta eFPGA IPs allow reducing the number of Electronic Control Units in automotive OEM supply chain - driving strong simplification of the supply chain and hence an important cost reduction.
Motor controls, Battery Monitoring System, etc.
Motor controls require simple but fast processing, often based on filters and fourier transforms. These require deterministic systems that can be updated to take into account changes in environment, components aging, etc.
Menta eFPGA IP are deterministic by nature and offer the optional Core DSP (CDSP) that is targeting, but not limited to, fast, and low power FFT.
Future complex automotive systems will soon make use of chips that are designed in technology nodes down to 7 or even 5nm. Using Menta eFPGA IPs allow reducing the risks of a re-spin and therefore saving masks cost and de-risking the time to market.
Sensors raw data are today filtered before being sent to the central processing units due to bandwidth limitations, mainly limited by the amoung of available electrical cables within the vehicle.
Menta eFGPA IPs allow all sensors raw data pre-treatment thanks to its highly parrallel processing capability. Redundancy checking can also be added the same way.
Menta eFPGA IPs advantages
100% 3rd party standard cells: fully verifiable wihin your own flow.
Can use automotive ready standard cells, at the expected temperature and voltage ranges.
Formal verification available at every stage of the eFPGA IP integration.
Standard scan chain DfT. Test coverage in excess of 99.8%. Fault coverage in excess of 99.5%.
No SRAM bitcells. High tolerance to Single Event Upsets.
Secured bitstream module through partnership with Secure-IC.
ISO 26262 certification work in progress.