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Menta eFPGA IPs are ideal for automotive semiconductor suppliers, allowing programmable logic in devices that manage security/cryptography, motor control, battery monitoring, raw data management, sensor fusion, AI and ADAS.



Autonomous driving / Artificial Intelligence

Menta eFPGA IPs allow efficient implementation of Neural Network algorithms for e.g. for ADAS vision applications - thanks to large bandwidth and very low latency. 
The deterministic nature of the eFPGA IPs also make them great candidates for situation awareness and decision making algorithms.

Motor controls, Battery Monitoring System, etc.

Motor controls require simple but fast processing, often based on filters and fourier transforms. These require deterministic systems that can be updated to take into account changes in environment, components aging, etc. 
Menta eFPGA IPs are deterministic by nature and offer the optional Core DSP (CDSP) that is targeting, but not limited to, fast, and low power FFT. 



Sensors raw data are today filtered before being sent to the central processing units due to bandwidth limitations, mainly limited by the amount of available electrical cables within the vehicle. 
Menta eFGPA IPs allow all sensors raw data pre-treatment thanks to their highly parallel processing capability. Redundancy checking can also be added the same way.


​Security of electronics system is of utmost importance - especially in life critical systems such as vehicles on the road. Running encryption / decryption algorithms on Menta eFPGA IPs allows these algorithms to be updated in the field - increasing the lifetime of the electronic systems embedded in the vehicle.

Electronic Control Units

Menta eFPGA IPs allow reducing the number of Electronic Control Units in automotive OEM supply chain - driving strong simplification of the supply chain and hence an important cost reduction.

Risk Reduction

Future complex automotive systems will soon make use of chips that are designed in technology nodes down to 7 or even 5nm. Using Menta eFPGA IPs allows reducing the risks of a re-spin and therefore saving masks cost and de-risking the time to market.



100% third party standard cells: fully verifiable wihin your own flow. Trusted eFPGA IP.​
ISO 26262 certification work in progress.
Formal verification available at every stage of the eFPGA IP integration.
No SRAM bitcells. High tolerance to Single Event Upsets. 
Standard scan chain DfT. Test coverage in excess of 99.8%. Fault coverage in excess of 99.5%.
Secured bitstream module through partnership with Secure-IC.
Can use automotive ready standard cells, at the expected temperature and voltage ranges.
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