Origami Programmer

Innovative, robust & easy to use Programming Software

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Embedded RTL parser and synthesis

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  • IEEE VHDL, Verilog and System-Verilog support

  • Synthesized RTL designs optimized to Menta eFPGA architecture

  • Timing or area driven

  • Free from any export-control and patent issues

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Complete Static Timing Analysis report

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  • SDC files support

  • Performances estimation based on selected technology node and libraries

  • Critical paths reports

  • Generation of setup and hold report

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Place & Route

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  • Powerful Place & Route engine

  • Low LUT usage and Optimum routing

  • Timing and IO placement constraints aware


​User friendly graphical interface

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  • Manual floorplanning: placement per zone or per block

  • Resources usage summary within GUI or as an ASCII file

  • Statistics on density

  • Scriptable TCL commands

Origami Programmer can be demonstrated through webEx and evaluation licenses delivered through the Menta Starter Pack (MSP).