Origami Programmer

Innovative, robust & easy to use Programming Software



Embedded RTL parser and synthesis

  • IEEE VHDL, Verilog and System-Verilog support

  • Synthesized RTL designs optimized to Menta eFPGA architecture

  • Timing or area driven

  • Free from any export-control and patent issues



Complete Static Timing Analysis report

  • SDC files support

  • Performances estimation based on selected technology node and libraries

  • Critical paths reports

  • Generation of setup and hold report

Place & Route


  • Powerful Place & Route engine

  • Low LUT usage and Optimum routing

  • Timing and IO placement constraints aware

User friendly graphical interface

  • Manual floorplanning: placement per zone or per block

  • Resources usage summary within GUI or as an ASCII file

  • Statistics on density

  • Scriptable TCL commands

Origami Programmer can be demonstrated through webEx and evaluation licenses delivered through the Menta Starter Pack (MSP).