About Us
Menta is a privately held company that delivers 100% third party standard-cells embedded FPGA IPs for SoC, ASIC or ASSP designs. Our technology lets users effortlessly update silicon post-production, whether to fix a bug, implement customer-specific features, adapt to evolving standards, or enhance security. Menta IPs are delivered with the Origami toolchain to generate the bitstream from RTL, including synthesis. Menta is backed by FJ Development EN, with an investment of more than $8.5M to date.
Our Executive Team
Our Advisory Board

Head of Institute for Information Processing Technologies (ITIV) at KIT
Dr Jürgen Becker, PhD
28 years of experience in SoC, heterogenous architectures, reconfigurable computing and others. Dr Becker authored more than 400 papers in international journals and conferences. Executive Board of IEEE Germany section.

CEO
Vincent Markus
Vincent has more than 15 years of experience in tech industries: 12 years in Thales as BU Manager, 3 years in Airbus as SVP Performance Management. Since, 15 years, Vincent was involved in various companies’ governance and funding.

Managing Director & VP of Business Development
Yoan Dupret
Yoan has 17+ years of experience in the semiconductor industry. He held various technical and managerial positions at DelfMEMS, Samsung, CSR, Infineon and Altis Semiconductor. Yoan holds a PhD from Supelec (France) and an Engineering degree (MSEE) from ESEO (France).

Director at Dassault Aviation, Natixis and FCC
Henri Proglio
Honorary President of EDF. Advisor of Huawei Europe. Was CEO of EDF from 2009 to 2014, CEO of Veolia from 2003 to 2009 and before that of Vivendi. Holds a MBA from HEC (France).
Our Partners
Andes Technology Corporation is a world class creator of innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve the rapidly growing global embedded system applications. The company delivers superior low power CPU cores, including the comprehensive RISC-V V5 family of processor cores, with integrated development environment and associated software/hardware solutions for efficient SoC design. Up to the end of 2018, the cumulative volume of Andes-Embedded™ SoCs has reached 3.5 billion with 2018 alone contributing over 1 billion. Andes Technology's comprehensive CPU line includes entry-level, mid-range, high-end, extensible and security families.
Codasip focuses on on-chip processor solutions for system on chip (SoC) designers. The offering includes the Codasip Studio processor design environment, the family of Codasip RISC-V embedded and application processor cores, and the SweRV Core™ Support Package for supporting open source RISC-V cores designed by Western Digital. Codasip solutions are based on open standards including the RISC-V open ISA, LLVM and UVM to ensure compatibility and longevity.
