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Menta offers growth opportunities in a dynamic environment. The company looks for strong contributors eager to work on a team dedicated to the advancement of innovative and disruptive products and technology. 


To apply, send an email with your resume to careers@menta-efpga.com. Indicate the position reference number in the subject line.

Senior FPGA Architect

Job description

 

You will be in charge of defining new product lines of Menta’s embedded FPGA IPs and you will be responsible for the development of the corresponding architectures. The candidate must have a strong expertise in FPGA, routing networks, Look-Up-Table architectures and configuration logic optimization.

 

Menta has developed a suite of tools and test suites that allow fast and easy exploration of various architectures – while taking into account the specificity of designing an ASIC IP. It is a unique opportunity to apply and expand a FPGA design expertise to the IP world.

The candidate will have a central role within the organization, working with the software team, the physical implementation team, the business development team and the top management.

Desired skills and experience

  • MS or a PhD in Electrical Engineering, Computer Science Mathematics or related discipline

  • At least 5 years of experience in FPGA architecture development within a FPGA company or in a dedicated R&D team

  • Experience in SoC / ASIC design is a plus

  • Good skill on RTL languages: VHDL and Verilog

  • Good analytical and problem-solving skills

  • Solid team player

  • Good written and spoken English is mandatory

 
The candidate will work in a dynamic environment and will get to work with teams from different technical areas in which new creative and innovative ideas will be much appreciated.

Senior Physical Implementation Engineer

Full time, based in Sophia-Antipolis, France.
 
Job description

 

Within the Physical Implementation team, you will be in charge of doing the ASIC physical implementation of eFPGA IP architectures to bring them into production.

This is a challenging position and an opportunity to work within a highly qualified team. You will get the chance to work on one of the most exciting new semiconductor products and on the most advanced process nodes (from 180nm to 5nm and beyond).

Desired skills and experience

  • 5+ years of experience in ASIC physical implementation

  • In depth knowledge of digital back-end EDA tool flows. Knowledge of Synopsys tool (ICC, ICC2, Primetime, StarRC, etc.) is a must. Knowledge of Mentor Graphics Calibre and Cadence tools are a plus.

  • Experience at IP level and IP integration at top level

  • Experience on advanced technology nodes, such as 28nm, 16nm, 14nm and below is required

  • Experience with make files and scripting languages such as Tcl, Python and bash

  • Technical background in RTL design (VHDL, Verilog, SystemVerilog) and/or RTL synthesis is a plus

  • Good written and spoken English is mandatory

  • Good analytical and problem-solving skills

  • Solid team player skills

  • MSc or PhD in Electrical Engineering or equivalent

 
The candidate will work in a dynamic environment and will get to work with teams from different technical areas in which new creative and innovative ideas will be much appreciated.